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19-1167; Rev 1; 2/97
10-Bit Voltage-Output DACs in 8-Pin MAX
__________________General Description
The MAX5354/MAX5355 combine a low-power, voltageoutput, 10-bit digital-to-analog converter (DAC) and a precision output amplifier in an 8-pin MAX or DIP package. The MAX5354 operates from a single +5V supply, and the MAX5355 operates from a single +3.3V supply. Both devices draw less than 280A of supply current. The output amplifier's inverting input is available to the user, allowing specific gain configurations, remote sensing, and high output current capability. This makes the MAX5354/MAX5355 ideal for a wide range of applications, including industrial process control. Other features include a software shutdown and power-on reset. The serial interface is compatible with SPITM/QSPITM and MicrowireTM. The DAC has a double-buffered input, organized as an input register followed by a DAC register. A 16-bit serial word loads data into the input register. The DAC register can be updated independently or simultaneously with the input register. All logic inputs are TTL/CMOS-logic compatible and buffered with Schmitt triggers to allow direct interfacing to optocouplers.
______________________________Features
o 10-Bit DAC with Configurable Output Amplifier o +5V Single-Supply Operation (MAX5354) +3.3V Single-Supply Operation (MAX5355) o Low Supply Current: 0.28mA Normal Operation 2A Shutdown Mode o Available in 8-Pin MAX o Power-On Reset Clears DAC Output to Zero o SPI/QSPI and Microwire Compatible o Schmitt-Trigger Digital Inputs for Direct Optocoupler Interface o +3.3V MAX5355 Directly Interfaces with +5V Logic
MAX5354/MAX5355
_________________Ordering Information
PART* MAX5354CPA MAX5354CUA MAX5354EPA MAX5354EUA MAX5354MJA TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C PIN-PACKAGE 8 Plastic DIP 8 MAX 8 Plastic DIP 8 MAX 8 CERDIP**
________________________Applications
Digital Offset and Gain Adjustment Industrial Process Controls Microprocessor-Controlled Systems Portable Test Instruments Remote Industrial Controls
Ordering Information continued at end of data sheet. *Contact factory for availability of 8-pin SO package. **Contact factory for availability and processing to MIL-STD-883.
____________________Functional Diagram
GND VDD REF FB OUT DAC
_______________________Pin Configuration
TOP VIEW
DAC REGISTER CONTROL INPUT REGISTER CS DIN SCLK
OUT 1 CS 2 DIN 3
8
VDD GND REF FB
MAX5354 MAX5355
7 6 5
16-BIT SHIFT REGISTER
MAX5354 MAX5355
SCLK 4
DIP/MAX
SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V REF, OUT, FB to GND ................................-0.3V to (VDD + 0.3V) Digital Inputs to GND ...............................................-0.3V to +6V Continuous Current into Any Pin.......................................20mA Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.09mW/C above +70C) .................727mW MAX (derate 4.10mW/C above +70C) ......................330mW CERDIP (derate 8.00mW/C above +70C) ...................640mW Operating Temperature Ranges MAX5354C_A/MAX5355C_A ................................0C to +70C MAX5354E_A/MAX5355E_A ..............................-40C to +85C MAX5354MJA/MAX5355MJA ..........................-55C to +125C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS: MAX5354
(VDD = +5V 10%, GND = 0V, REF = 2.5V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C. Output buffer connected in unity-gain configuration (Figure 8).) PARAMETER Resolution Integral Nonlinearity (Note 1) Differential Nonlinearity Offset Error Offset-Error Tempco Gain Error (Note 1) Gain-Error Tempco Power-Supply Rejection Ratio REFERENCE INPUT Reference Input Range Reference Input Resistance Reference -3dB Bandwidth Reference Feedthrough Signal-to-Noise Plus Distortion Ratio DIGITAL INPUTS Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance VIH VIL IIN CIN VIN = 0V or VDD 0.001 8 2.4 0.8 0.5 V V A pF SINAD VREF RREF Code dependent, minimum at code 1550 hex VREF = 0.67Vp-p Input code = all 0s, VREF = 3.6Vp-p at 1kHz VREF = 1Vp-p at 25kHz, code = full scale 0 18 30 650 -84 77 VDD - 1.4 V k kHz dB dB PSRR 4.5V VDD 5.5V SYMBOL N INL DNL VOS TCVOS GE MAX5354C/E MAX5354M Guaranteed monotonic 0.3 6 -0.3 1 800 2 CONDITIONS MIN 10 1 2 1.0 8 TYP MAX UNITS Bits LSB LSB mV ppm/C LSB ppm/C V/V STATIC PERFORMANCE--ANALOG SECTION
MULTIPLYING-MODE PERFORMANCE
2
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10-Bit Voltage-Output DACs in 8-Pin MAX
ELECTRICAL CHARACTERISTICS: MAX5354 (continued)
(VDD = +5V 10%, GND = 0V, REF = 2.5V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C. Output buffer connected in unity-gain configuration (Figure 8).) PARAMETER DYNAMIC PERFORMANCE DIGITAL INPUTS Voltage Output Slew Rate Output Settling Time Output Voltage Swing Current into FB Start-Up Time Digital Feedthrough POWER SUPPLIES Supply Voltage Supply Current Supply Current in Shutdown Reference Current in Shutdown TIMING CHARACTERISTICS (Figure 6) SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time SCLK Rise to CS Fall Delay CS Rise to SCLK Rise Hold Time CS Pulse Width High tCP tCH tCL tCSS tCSH tDS tDH tCS0 tCS1 tCSW 100 40 40 40 0 40 0 40 40 100 ns ns ns ns ns ns ns ns ns ns VDD IDD (Note 3) (Note 3) 4.5 0.28 4 0.001 5.5 0.4 20 0.5 V mA A A CS = VDD, DIN = 100kHz SR To 1/2LSB, VSTEP = 2.5V Rail-to-rail (Note 2) 0.6 10 0 to VDD 0.001 20 5 0.1 V/s s V A s nV-s SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5354/MAX5355
Note 1: Guaranteed from code 3 to code 1023 in unity-gain configuration. Note 2: Accuracy is better than 1LSB for VOUT = 8mV to VDD - 100mV, guaranteed by a power-supply rejection test at the end points. Note 3: RL = , digital inputs at GND or VDD.
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3
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
ELECTRICAL CHARACTERISTICS: MAX5355
(VDD = +3.15V to +3.6V, REF = 1.25V, GND = 0V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C. Output buffer connected in unity-gain configuration (Figure 8).) PARAMETER Resolution Integral Nonlinearity (Note 4) Differential Nonlinearity Offset Error Offset-Error Tempco Gain Error (Note 4) Gain-Error Tempco Power-Supply Rejection Ratio REFERENCE INPUT Reference Input Range Reference Input Resistance Reference -3dB Bandwidth Reference Feedthrough Signal-to-Noise Plus Distortion Ratio DIGITAL INPUTS Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance DYNAMIC PERFORMANCE Voltage Output Slew Rate Output Settling Time Output Voltage Swing Current into FB Start-Up Time Digital Feedthrough POWER SUPPLIES Supply Voltage Supply Current Supply Current in Shutdown Reference Current in Shutdown VDD IDD (Note 6) (Note 6) 3.15 0.24 1.6 0.001 3.6 0.4 10 0.5 V mA A A CS = VDD, DIN = 100kHz SR To 1/2LSB, VSTEP = 1.25V Rail-to-rail (Note 5) 0.6 10 0 to VDD 0.001 20 5 0.1 V/s s V A s nV-s VIH VIL IIN CIN VIN = 0V or VDD 0.001 8 2.4 0.6 0.5 V V A pF SINAD VREF RREF Code dependent, minimum at code 1550 hex VREF = 0.67Vp-p Input code = all 0s, VREF = 1.9Vp-p at 1kHz VREF = 1Vp-p at 25kHz, code = full scale 0 18 30 650 -84 72 VDD - 1.4 V k kHz dB dB PSRR SYMBOL N INL DNL VOS TCVOS GE MAX5355C/E MAX5355M Guaranteed monotonic 0.3 6 -0.3 1 800 2 CONDITIONS MIN 10 1 2 1.0 8 TYP MAX UNITS Bits LSB LSB mV ppm/C LSB ppm/C V/V
STATIC PERFORMANCE--ANALOG SECTION
MULTIPLYING-MODE PERFORMANCE (VDD = +3.3V)
4
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10-Bit Voltage-Output DACs in 8-Pin MAX
ELECTRICAL CHARACTERISTICS: MAX5355 (continued)
(VDD = +3.15V to +3.6V, REF = 1.25V, GND = 0V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C. Output buffer connected in unity-gain configuration (Figure 8).) PARAMETER SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time SCLK Rise to CS Fall Delay CS Rise to SCLK Rise Hold Time CS Pulse Width High SYMBOL tCP tCH tCL tCSS tCSH tDS tDH tCS0 tCS1 tCSW CONDITIONS MIN 100 40 40 40 0 40 0 40 40 100 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns TIMING CHARACTERISTICS (Figure 6)
MAX5354/MAX5355
Note 4: Guaranteed from code 6 to code 1023 in unity-gain configuration. Note 5: Accuracy is better than 1LSB for VOUT = 8mV to VDD - 150mV, guaranteed by a power-supply rejection test at the end points. Note 6: RL = , digital inputs at GND or VDD.
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10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
__________________________________________Typical Operating Characteristics
(MAX5354 only, VDD = +5V, RL = 5k, CL = 100pF, TA = +25C, unless otherwise noted.)
MAX5354
INTEGRAL NONLINEARITY vs. REFERENCE VOLTAGE
MAX5354-01
REFERENCE VOLTAGE INPUT FREQUENCY RESPONSE
MAX5354-02
SUPPLY CURRENT vs. TEMPERATURE
380 360 SUPPLY CURRENT (A) 340 320 300 280 260 240 220 RL =
MAX5354-03
0.050
0
400
0.025 RELATIVE OUTPUT (dB) INL (LSB)
-4
-8
0
-12
-0.025
-16
-0.050 0.4 1.2 2.0 2.8 3.6 4.4 REFERENCE VOLTAGE (V)
-20 0 500k 1M 1.5M 2M 2.5M 3M FREQUENCY (Hz)
200 -60
-20
20
60
100
140
TEMPERATURE (C)
POWER-DOWN SUPPLY CURRENT vs. TEMPERATURE
MAX5354-04
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5354-05
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
-55 -60 THD + NOISE (dB) -65 -70 -75 -80 -85 -90 1 10 FREQUENCY (kHz) 100 VREF = 2.5VDC + 1 Vp-p SINE CODE = FULL SCALE
MAX5354-06
10 POWER-DOWN SUPPLY CURRENT (A) 9 8
500 450 400 SUPPLY CURRENT (A) 350 300 250 200 150 100 50 0
-50
7 6 5 4 3 2 1 0 -60 -20 20 60 100 140
4.0
4.4
4.8
5.2
5.6
6.0
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
OUTPUT FFT PLOT
MAX5354-07
OUTPUT VOLTAGE vs. LOAD
MAX5354-08
REFERENCE FEEDTHROUGH AT 1kHz
REFERENCE INPUT SIGNAL -20 SIGNAL AMPLITUDE (dB)
MAX5354-09a/09b
0
-20 SIGNAL AMPLITUDE (dB)
VREF = +3.6Vp-p CODE = FULL SCALE fIN = 1kHz
2.49980 2.49976 OUTPUT VOLTAGE (V) 2.49972 2.49968 2.49964 2.49960 2.49956 0.1k
0
-40
-40
-60
-60 OUTPUT FEEDTHROUGH -80
-80
-100 0.5 1.6 2.7 3.8 4.9 6.0 FREQUENCY (kHz)
-100 1k 10k LOAD () 100k 1M 0.5 1.6 2.7 3.8 4.9 6.0 FREQUENCY (kHz)
6
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10-Bit Voltage-Output DACs in 8-Pin MAX
____________________________Typical Operating Characteristics (continued)
(MAX5354 only, VDD = +5V, RL = 5k, CL = 100pF, TA = +25C, unless otherwise noted.)
MAX5354/MAX5355
MAX5354 (continued)
MAJOR-CARRY TRANSITION
MAX5354-10a
DIGITAL FEEDTHROUGH (fSCLK = 100kHz)
MAX5354-11a
CS 5V/div
SCLK, 2V/div
OUT, AC COUPLED 100mV/div
OUT, AC COUPLED 10mV/div CODE = 512
10s/div CS = 5V
2s/div
DYNAMIC RESPONSE
MAX5354-12a
OUT 1V/div
GND
10s/div GAIN = +2, SWITCHING FROM CODE 0 TO 1005
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7
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
____________________________Typical Operating Characteristics (continued)
(MAX5355 only, VDD = +3.3V, RL = 5k, CL = 100pF, TA = +25C, unless otherwise noted.)
MAX5355
INTEGRAL NONLINEARITY vs. REFERENCE VOLTAGE
MAX5355-10
REFERENCE VOLTAGE INPUT FREQUENCY RESPONSE
MAX5355-11
SUPPLY CURRENT vs. TEMPERATURE
RL = 340 SUPPLY CURRENT (A) 320 300 280 260 240 220
MAX5355-12
0.050
0
360
0.025 RELATIVE OUTPUT (dB) INL (LSB)
-4
-8
0
-12
-0.025
-16
-0.050 0.4 0.8 1.2 1.6 2.0 REFERENCE VOLTAGE (V) 2.4
-20 100k
500k
1M
1.5M
2M
2.5M
200 -60
-20
20
60
100
140
FREQUENCY (Hz)
TEMPERATURE (C)
POWER-DOWN SUPPLY CURRENT vs. TEMPERATURE
MAX5355-13
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5355-14
POWER-DOWN SUPPLY CURRENT (A)
4.5 4.0
400 SUPPLY CURRENT (A) 350 300 250 200 150 100
-55 THD + NOISE (dB) -60 -65 -70 -75 -80 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 1
VREF = 1VDC + 0.5Vp-p SINE CODE = FULL SCALE
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -60 -20 20 60 100 140
10 FREQUENCY (kHz)
100
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
OUTPUT FFT PLOT
MAX5355-16
FULL-SCALE OUTPUT vs. LOAD
MAX5355-17
REFERENCE FEEDTHROUGH AT 1kHz
REFERENCE INPUT SIGNAL SIGNAL AMPLITUDE (dB) -20
MAX5355-18
0 VREF = 1.9Vp-p CODE = FULL SCALE fIN = 1kHz
1.24940 1.24935 FULL-SCALE OUTPUT (V) 1.24930 1.24925 1.24920 1.24915 1.24910 100
0
-20 SIGNAL AMPLITUDE (dB)
-40
-40
-60
-60 OUTPUT FEEDTHROUGH -80
-80
-100 0.5 1.6 2.7 3.8 4.9 6.0 FREQUENCY (kHz)
-100 1k 10k 100k 1M 10M 0.5 1.2 1.9 2.6 3.3 4.0 LOAD () FREQUENCY (kHz)
8
_______________________________________________________________________________________
MAX5355-15
5.0
450
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
-50
10-Bit Voltage-Output DACs in 8-Pin MAX
_____________________Pin Description
FB
MAX5354/MAX5355
PIN 1 2 3 4 5 6 7 8
NAME OUT CS DIN SCLK FB REF GND VDD
FUNCTION DAC Output Voltage Chip-Select Input. Active low. Serial-Data Input Serial-Clock Input DAC Output Amplifier Feedback Reference Voltage Input
AGND REF 2R 2R R R R OUT
2R
2R
2R MSB
Ground Positive Power Supply
SHOWN FOR ALL 1s ON DAC
Figure 1. Simplified DAC Circuit Diagram
_______________Detailed Description
The MAX5354/MAX5355 contain a voltage-output digital-to-analog converter (DAC) that is easily addressed using a simple 3-wire serial interface. Each IC includes a 16-bit shift register, and has a double-buffered input composed of an input register and a DAC register (see Functional Diagram). In addition to the voltage output, the amplifier's negative input is available to the user. The DAC is an inverted R-2R ladder network that converts a digital input (10 data bits plus three sub-bits) into an equivalent analog output voltage in proportion to the applied reference voltage. Figure 1 shows a simplified circuit diagram of the DAC.
In shutdown mode, the MAX5354/MAX5355's REF input enters a high-impedance state with a typical input leakage current of 0.001A. The reference input capacitance is also code dependent and typically ranges from 15pF (with an input code of all 0s) to 50pF (at full scale). The MAX873 +2.5V reference is recommended for use with the MAX5354.
Output Amplifier
The MAX5354/MAX5355's DAC output is internally buffered by a precision amplifier with a typical slew rate of 0.6V/s. Access to the output amplifier's inverting input provides the user greater flexibility in output gain setting/signal conditioning (see the Applications Information section). With a full-scale transition at the MAX5354/MAX5355 output, the typical settling time to 1/2LSB is 10s when loaded with 5k in parallel with 100pF (loads less than 2k degrade performance). The amplifier's output dynamic responses and settling performances are shown in the Typical Operating Characteristics.
Reference Inputs
The reference input accepts positive DC and AC signals. The voltage at the reference input sets the fullscale output voltage for the DAC. The reference input voltage range is 0V to (VDD - 1.4V). The output voltage (VOUT) is represented by a digitally programmable voltage source, as expressed in the following equation: VOUT = (VREF x NB / 1024) x Gain where NB is the numeric value of the DAC's binary input code (0 to 1023), VREF is the reference voltage, and Gain is the externally set voltage gain. The impedance at the reference input is code dependent, ranging from a low value of 18k when the DAC has an input code of 1550 hex, to a high value exceeding several giga ohms (leakage currents) with an input code of 0000 hex. Because the input impedance at the reference pin is code dependent, load regulation of the reference source is important.
Shutdown Mode
The MAX5354/MAX5355 feature a software-programmable shutdown that reduces supply current to a typical value of 4A. Writing 111X XXXX XXXX XXXX as the inputcontrol word puts the device in shutdown mode (Table 1).
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9
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
In shutdown mode, the amplifier's output and the reference input enter a high-impedance state. The serial interface remains active. Data in the input register is retained in shutdown, allowing the MAX5354/MAX5355 to recall the output state prior to entering shutdown. Exit shutdown mode by either recalling the previous configuration or updating the DAC with new data. When powering up the device or bringing it out of shutdown, allow 20s for the outputs to stabilize.
SCLK
SK
MAX5354 MAX5355
DIN
SO
MICROWIRE PORT
Serial-Interface Configurations
The MAX5354/MAX5355's 3-wire serial interface is compatible with both MicrowireTM (Figure 2) and SPITM/QSPITM (Figure 3). The serial input word consists of three control bits followed by 10+3 data bits (MSB first), as shown in Figure 4. The 3-bit control code determines the MAX5354/MAX5355's response outlined in Table 1. The MAX5354/MAX5355's digital inputs are double buffered. Depending on the command issued through the serial interface, the input register can be loaded without affecting the DAC register, the DAC register can be loaded directly, or the DAC register can be updated from the input register (Table 1). The +3.3V MAX5355 can also directly interface with +5V logic.
CS I/O
Figure 2. Connections for Microwire
+5V
SS
Serial-Interface Description
The MAX5354/MAX5355 require 16 bits of serial data. Table 1 lists the serial-interface programming commands. For certain commands, the 10+3 data bits are "don't cares." Data is sent MSB first and can be sent in two 8-bit packets or one 16-bit word (CS must remain low until 16 bits are transferred). The serial data is composed of three control bits (C2, C1, C0), followed by the 10+3 data bits D9...D0, S2, S1, S0 (Figure 4). Set the sub-bits (S2, S1, S0) to zero. The 3-bit control code determines: * the register to be updated, * the configuration when exiting shutdown. Figure 5 shows the serial-interface timing requirements. The chip-select pin (CS) must be low to enable the DAC's serial interface. When CS is high, the interface control circuitry is disabled. CS must go low at least t CSS before the rising serial clock (SCLK) edge to properly clock in the first bit. When CS is low, data is clocked into the internal shift register via the serial-data input pin (DIN) on SCLK's rising edge. The maximum guaranteed clock frequency is 10MHz. Data is latched into the MAX5354/MAX5355 input/DAC register on CS's rising edge.
DIN MOSI SPI/QSPI PORT
MAX5354 MAX5355
SCLK
SCK
CS
I/O
CPOL = 0, CPHA = 0
Figure 3. Connections for SPI/QSPI
MSB ..................................................................................LSB 16 Bits of Serial Data Control Bits C2 C1 3 Control Bits C0 Data Bits MSB............................LSB Sub-Bits D9 ...............................D0, S2, S1, S0 10+3 Data Bits
Figure 4. Serial-Data Format
10
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10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
Table 1. Serial-Interface Programming Commands
16-BIT16-BIT SERIAL WORD SERIAL WORD C2 C1 X X X 1 0 0 0 1 1 1 C0 0 1 0 1 1 D9.......................D0 MSB LSB 10 bits of data 10 bits of data XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX FUNCTION S2...S0 000 000 XXX XXX XXX Load input register; DAC register immediately updated (also exit shutdown). Load input register; DAC register unchanged. Update DAC register from input register (also exit shutdown; recall previous state). Shutdown No operation (NOP)
"X" = Don't care
CS COMMAND EXECUTED 1 DIN C2 C1 C0 D9 D8 D7 D6 8 D5 D4 9 D3 D2 D1 D0 S2 S1 16 S0
SCLK
Figure 5. Serial-Interface Timing Diagram
CS tCSO SCLK tDS DIN tDH tCSS tCL tCH tCP tCSH tCS1
tCSW
Figure 6. Detailed Serial-Interface Timing Diagram
______________________________________________________________________________________ 11
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
DIN SCLK CS1 CS2 CS3 TO OTHER SERIAL DEVICES
CS
CS
CS
MAX5354 MAX5355
SCLK DIN SCLK DIN
MAX5354 MAX5355
SCLK DIN
MAX5354 MAX5355
Figure 7. Multiple MAX5354/MAX5355s Sharing Common DIN and SCLK Lines
Figure 7 shows a method of connecting several MAX5354/MAX5355s. In this configuration, the clock and the data bus are common to all devices, and separate chip-select lines are used for each IC.
Table 2. Unipolar Code Table
MSB DAC CONTENTS LSB (000) ANALOG OUTPUT
1023 +VREF 1024 513 +VREF 1024 512 + VREF +VREF = 2 1024 511 +VREF 1024 1 +VREF 1024
__________Applications Information
Unipolar Output
For a unipolar output, the output voltage and the reference input have the same polarity. Figure 8 shows the MAX5354/MAX5355 unipolar output circuit, which is also the typical operating circuit. Table 2 lists the unipolar output codes. Figure 9 illustrates a rail-to-rail output configuration. This circuit shows the MAX5354 with the output amplifier configured for a closed-loop gain of +2, to provide a 0V to 5V full-scale range when a 2.5V reference is used. When the MAX5355 is used with a 1.25V reference, this circuit provides a 0V to 2.5V full-scale range.
11 1111 1111
10 0000 0001
(000)
10 0000 0000
(000)
01 1111 1111
(000)
00 0000 0001 00 0000 0000
(000) (000)
0V
Bipolar Output
The MAX5354/MAX5355 output can be configured for bipolar operation using Figure 10's circuit, according to the following equation: VOUT = VREF [(2NB / 1024) - 1] where NB is the numeric value of the DAC's binary input code. Table 3 shows digital codes (offset binary) and corresponding output voltage for Figure 10's circuit.
NOTE: ( ) are for sub-bits.
Using an AC Reference
In applications where the reference has AC-signal components, the MAX5354/MAX5355 have multiplying capability within the reference input range specifications. Figure 11 shows a technique for applying a sinewave signal to the reference input where the AC signal is offset before being applied to REF. The reference voltage must never be more negative than GND.
12
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10-Bit Voltage-Output DACs in 8-Pin MAX
Table 3. Bipolar Code Table
MSB DAC CONTENTS LSB (000) ANALOG OUTPUT
511 +VREF 512 1 +VREF 512
11 1111 1111
The MAX5354's total harmonic distortion plus noise (THD+N) is typically less than -77dB (full-scale code), and the MAX5355's THD+N is typically less than -72dB (full-scale code), given a 1Vp-p signal swing and input frequencies up to 25kHz. The typical -3dB frequency is 650kHz for both devices, as shown in the Typical Operating Characteristics graphs.
MAX5354/MAX5355
10 0000 0001 10 0000 0000 01 1111 1111
(000) (000) (000)
Digitally Programmable Current Source
The circuit of Figure 12 places an NPN transistor (2N3904 or similar) within the op-amp feedback loop to implement a digitally programmable, unidirectional current source. The output current is calculated with the following equation: IOUT = (VREF/R) x (NB/1024) where NB is the numeric value of the DAC's binary input code and R is the sense resistor shown in Figure 12.
0V
1 -VREF 512 511 -VREF 512 512 -VREF = - VREF 512
00 0000 0001
(000)
00 0000 0000
(000)
NOTE: ( ) are for sub-bits.
MAX5354 MAX5355
REF
+5V/3.3V
MAX5354 MAX5355
REF
+5V/+3.3V
VDD
FB
VDD
FB
10k 10k
DAC OUT GND
DAC
OUT GND
Figure 8. Unipolar Output Circuit
Figure 9. Unipolar Rail-to-Rail Output Circuit
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13
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
R1 REF +5V/+3.3V VDD FB VOUT DAC OUT VDAC OUT AC REFERENCE INPUT V+ 500mVp-p 10k REF VDD R2 +5V/ +3.3V 26k +5V/+3.3V
MAX495
MAX5354 MAX5355
GND
R1 = R2 = 10k 0.1%
MAX5354 MAX5355 GND
Figure 10. Bipolar Output Circuit
Figure 11. AC Reference Input Circuit
Grounding and Layout Considerations
+5V/+3.3V REF VDD VL DAC
MAX5354 MAX5355
OUT
IOUT 2N3904
Digital or AC transient signals on GND can create noise at the analog output. Tie GND to the highest-quality ground available. Good printed circuit board ground layout minimizes crosstalk between the DAC output, reference input, and digital input. Reduce crosstalk by keeping analog lines away from digital lines. Wire-wrapped boards are not recommended.
FB GND
R
Figure 12. Digitally Programmable Current Source
Power-Supply Considerations
On power-up, the input and DAC registers are cleared (set to zero code). For rated MAX5354/MAX5355 performance, REF must be at least 1.4V below VDD. Bypass VDD with a 4.7F capacitor in parallel with a 0.1F capacitor to GND. Use short lead lengths and place the bypass capacitors as close to the supply pins as possible.
14
______________________________________________________________________________________
10-Bit Voltage-Output DACs in 8-Pin MAX
_Ordering Information (continued)
PART* MAX5355CPA MAX5355CUA MAX5355EPA MAX5355EUA MAX5355MJA TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C PIN-PACKAGE 8 Plastic DIP 8 MAX 8 Plastic DIP 8 MAX 8 CERDIP**
___________________Chip Information
TRANSISTOR COUNT: 1677
MAX5354/MAX5355
*Contact factory for availability of 8-pin SO package. **Contact factory for availability and processing to MIL-STD-883.
________________________________________________________Package Information
PDIPN.EPS CDIPS.EPS
______________________________________________________________________________________
15
10-Bit Voltage-Output DACs in 8-Pin MAX MAX5354/MAX5355
___________________________________________Package Information (continued)
8LUMAXD.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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